The basic logic gates NOT, AND, NAND, OR, NOR, XOR, and XNOR are fundamental building blocks in digital circuits corresponding to Boolean operators.
We refer to them as combinational logic in digital design because their outputs are determined entirely by the combination of input values. One set of inputs always produces a given output. Therefore, we can construct truth tables that list all possible input combinations and their corresponding outputs.
The sections below show interactive ANSI/IEEE symbols, truth tables, Boolean symbols, and VHDL operators for all standard logic gates. I’m using the binary values 1 and 0 in the examples, but you can just as well use the terms true or false.
Play with the switches to see how the outputs change! 😀
The inverter, also called a NOT gate, outputs the opposite of its binary input (0 or 1). The tiny circle or bubble on the output side of the triangle is a symbol for logical inversion. Whenever you see this on any logic gate, it means that the output is the inverse of whatever it would be if the circle weren’t there. A triangle without the circle is a symbol of a buffer, a circuit that strengthens the output signal without changing it. Thus, the inverter is just a buffer that also inverts the output.
| Inputs | Output |
|---|---|
| 0 | 1 |
| 1 | 0 |
Q = \overline{A}
not
q <= not a;
The AND gate only outputs 1 if all inputs are also 1. Otherwise, the output is always 0. AND gates may have two or more inputs, but always only one output bit. The most common notation for the Boolean AND operator is a centered dot: Q = A · B. Often, the dot is omitted: Q = AB, in which case it also means AND logic. The VHDL and operator performs a logical AND between two values. If the two input operands (a and b) are vectors, they must be of equal length. The product (q) will then also be a vector of the same length, where each element’s value is the ANDing of the corresponding elements in the operands: [q(0) <= a(0) and b(0), …]. In ≥ VHDL-2008, you can also use the unary and operator: q <= and slv; Given that the right-hand operator is a vector of binary or Boolean values like signal slv : std_logic_vector(7 downto 0), it will produce the logical AND of all the elements in that array.
| Inputs | Output |
|---|---|
| 0 0 | 0 |
| 0 1 | 0 |
| 1 0 | 0 |
| 1 1 | 1 |
Q = A · B
and
q <= a and b;
The NAND gate is simply an AND with the output inverted. Each value in the truth table is the opposite of that in the AND’s truth table. NAND gates are particularly interesting in digital logic design because you can construct all other logic gates from them. If you only had access to NAND gates, you could build a complete, functioning digital design by arranging and interconnecting them cleverly. The Boolean operator for the NAND is the same as for the AND, but with a line above the whole expression to indicate its inverted output: Q = \overline{A · B}, or just Q = \overline{AB}. The VHDL operator is nand. This operator also works on single values as well as vectors, and there’s a unary nand operator (≥ VHDL-2008).
| Inputs | Output |
|---|---|
| 0 0 | 1 |
| 0 1 | 1 |
| 1 0 | 1 |
| 1 1 | 0 |
Q = \overline{A · B}
nand
q <= a nand b;
The OR gate outputs 1 if any input is 1. It only outputs 0 if all inputs are 0. OR gates may have two or more inputs, but always only one output bit. The Boolean OR operator is usually denoted with a plus sign: Q = A + B. The VHDL or operator performs a logical OR between two values. If the two input operands (a and b) are vectors, they must be of equal length. The sum (q) will then also be a vector of the same length, where each element’s value is the ORing of the corresponding elements in the operands. In ≥ VHDL-2008, you can also use the unary or operator: q <= or slv; Given that the right-hand operator is a vector of binary or Boolean values, it will produce the logical OR of all the elements in that array.
| Inputs | Output |
|---|---|
| 0 0 | 0 |
| 0 1 | 1 |
| 1 0 | 1 |
| 1 1 | 1 |
Q = A + B
or
q <= a or b;
The NOR gate is an OR gate with the output inverted. Each value in the truth table is the opposite of that in the OR’s truth table. The Boolean operator for the NOR is the same as for the OR, but with a line above the whole expression to indicate its inverted output: Q = \overline{A + B}. The VHDL operator is nor. This operator also works on single values as well as vectors, and there’s a unary nor operator (≥ VHDL-2008).
| Inputs | Output |
|---|---|
| 0 0 | 1 |
| 0 1 | 0 |
| 1 0 | 0 |
| 1 1 | 0 |
Q = \overline{A + B}
nor
q <= a nor b;
The XOR (exclusive-OR) gate outputs 1 only if the inputs are different. If the inputs are the same, the output is 0. The XOR operator is denoted with the symbol ⊕: Q = A ⊕ B. The VHDL xor operator performs a logical XOR between two values. If the two input operands (a and b) are vectors, they must be of equal length. The sum (q) will then also be a vector of the same length, where each element’s value is the XORing of the corresponding elements in the operands. In ≥ VHDL-2008, you can also use the unary xor operator: q <= xor slv; Given that the right-hand operator is a vector of binary or Boolean values, it will produce the logical XOR of all the elements in that array. The result will be 1 if an odd number of the elements are 1.
| Inputs | Output |
|---|---|
| 0 0 | 0 |
| 0 1 | 1 |
| 1 0 | 1 |
| 1 1 | 0 |
Q = A ⊕ B
xor
q <= a xor b;
The XNOR (exclusive-NOR) gate is an XOR gate with the output inverted. Each value in the truth table is the opposite of that in the XOR’s truth table. The XNOR gate outputs 1 only if the inputs are the same. If the inputs are different, the output is 0. The Boolean operator for the XNOR is the same as for the XOR, but with a line above the whole expression to indicate its inverted output: Q = \overline{A ⊕ B}. The VHDL operator is xnor. This operator also works on single values as well as vectors, and there’s a unary xnor operator (≥ VHDL-2008).
| Inputs | Output |
|---|---|
| 0 0 | 1 |
| 0 1 | 0 |
| 1 0 | 0 |
| 1 1 | 1 |
Q = \overline{A ⊕ B}
xnor
q <= a xnor b;